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PCB Trace Width Calculator: IPC-2221 vs IPC-2152 Side by Side

The only free US calculator that runs IPC-2221 and IPC-2152 simultaneously and shows the % difference. Three solve modes (width, current, temp rise), IPC-2152 correction factors, fusing current, microstrip impedance, and a current-vs-width chart with both standards plotted. Backed by IPC, NIST, and UL 796.

📈 IPC-2221 + IPC-2152 Side by Side 🔎 3 Solve Modes ⚡ IPC-2152 Correction Factors 🔥 Fusing Current (Brooks) 🕉 Microstrip Impedance ✅ IPC / NIST / UL 796 Referenced
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PCB Trace Width Calculator
IPC-2221 (1998) + IPC-2152 (2009) • External and internal layers • 0.5 to 4 oz copper • Fusing current
A
°C amb.
inches
cm
IPC-2152 Correction Factors
mil

Hammerstad approximation: Z₀ = (87/√(εr+1.41)) × ln(5.98H/(0.8W+T)). Accurate to within 2% for W/H > 0.1. For precision RF design, use a field solver (EMPro, Sonnet, Simbeor).

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Select a solve mode, enter your current and temperature rise, and click Calculate PCB Trace Width to see IPC-2221 vs IPC-2152 results side by side, fusing current, resistance, voltage drop, and the current-vs-width chart.

IPC-2221 vs IPC-2152: Why the Standard You Use Changes Your Design

Walk into any PCB design team in the US and ask about trace width calculation, and nine times out of ten they will quote IPC-2221. That makes sense: IPC-2221 is straightforward, widely taught, and has been the go-to reference since 1998 when it replaced the even older IPC-D-275. The formula fits on one line and produces a result in seconds. The problem is that IPC-2221’s underlying test data comes from research conducted in the 1950s and 1960s, using test boards and measurement methods that have since been superseded. The standard’s own working group acknowledged this limitation when IPC-2152 was published in 2009.

IPC-2152 does not replace IPC-2221 with a simpler formula. Instead, it replaces the single curve from the old standard with over 100 charts covering different copper weights, board thicknesses, layer positions, ambient environments, and distance to copper planes. The standard is more complex to use manually, which is why most engineers continue using IPC-2221 for everyday work. This calculator implements both standards side by side so you can see exactly how much IPC-2152 changes the result for your specific design conditions.

IPC-2221 Formula (1998 standard, all competitors use this)
IPC-2221 External: I = 0.048 × ΔT^0.44 × Ac^0.725
IPC-2221 Internal: I = 0.024 × ΔT^0.44 × Ac^0.725
IPC-2152 Base Formula (2009 standard, smps.us curve fit from IPC Fig. 5-2)
Ac = (117.555 × ΔT^−0.913 + 1.15) × I^(0.84 × ΔT^−0.108 + 1.159)
Width = (Ac × B_mod × P_mod × C_mod × L_mod) / Thickness_mils
Where Ac = cross-sectional area (mils²), ΔT = temperature rise (°C), I = current (A), Thickness = copper_oz × 1.378 mils/oz. Modifiers: B=board thickness, P=plane proximity, C=thermal conductivity, L=layer position. NIST copper resistivity: 1.72×10⁻⁶ Ω•cm at 20°C.

Which Standard Should You Use for US Commercial Products?

For a new design targeting commercial certification in the United States, IPC-2152 is the more accurate standard. UL 796 (the US standard for printed wiring boards) does not mandate a specific trace width calculation method, but it does require that the board safely carry its rated current without exceeding the maximum rated temperature. IPC-2152’s more refined thermal model, particularly its accounting for plane proximity and board thickness effects, gives you better agreement with actual measured board temperatures. In practice, IPC-2152 usually predicts a narrower minimum trace width than IPC-2221 for the same conditions, meaning you can use less copper without exceeding the thermal limit. For consumer products targeting miniaturization, this can translate to meaningful space savings on crowded boards.

For conservative designs, safety-critical applications, or any design that will be submitted for regulatory review, using the IPC-2221 result adds a comfortable margin since it specifies a wider trace that runs cooler than the IPC-2152 minimum. This calculator shows both so you can make an informed choice based on your specific requirements.

How This PCB Trace Width Calculator Works: Step by Step

Step 1: Choosing the Correct Temperature Rise

The temperature rise you specify is the most consequential input in the calculation. IPC-2221 and IPC-2152 both use delta T as the key thermal parameter, and it represents how many degrees Celsius hotter than ambient you will allow the trace to run. A 10 degree Celsius rise is the IPC default and is appropriate for most commercial electronics. A 5 degree rise gives a more conservative, wider trace suitable for high-reliability military or medical designs. A 20 to 30 degree rise is used in dense power electronics where board space is constrained and the total board temperature is carefully controlled. Note that the ambient temperature input is used only for the resistance and voltage drop calculations; it does not affect the trace width result directly, since the IPC standards define width in terms of delta T above ambient rather than an absolute temperature.

Step 2: IPC-2152 Correction Factors Explained

The four correction modifiers in this calculator are derived from the IPC-2152 chart data and implemented as approximate multipliers on the cross-sectional area. Board thickness affects heat spreading through the FR4 substrate: a thicker board provides more dielectric material to conduct heat away from internal traces, slightly reducing the required trace width. Plane proximity is often the most significant correction: a copper pour or ground plane within 1mm of a current-carrying trace acts as a heat sink, reducing its effective temperature rise and allowing a meaningfully narrower trace. The thermal conductivity modifier accounts for substrate material: Rogers high-frequency laminates (0.30 W/mK) dissipate heat about 50 percent better than standard FR4 (0.20 W/mK), while aluminum-backed PCBs (IMS substrates, over 1.0 W/mK) allow dramatically narrower traces. Layer position: internal traces are surrounded by FR4 on all sides, which is a much poorer thermal conductor than air, requiring approximately 50 percent more cross-sectional area for the same temperature rise.

Step 3: Fusing Current Calculation

The fusing current is the maximum current at which the copper trace will physically melt and open-circuit, acting as an unintentional fuse. This calculator uses the Brooks empirical formula: I_fuse = 12.3 times A^0.45, where A is the cross-sectional area in square mils. The safety margin shown is the percentage by which the fusing current exceeds your operating current. A 200 percent margin means the trace would need to carry three times your operating current before it melts. A margin below 50 percent deserves careful scrutiny, especially for traces in enclosed areas where heat cannot dissipate freely. The fusing current should never be the primary basis for trace sizing (that is what the IPC formulas are for), but knowing where your design falls on the melt-versus-safe spectrum is useful information that no other free web calculator currently provides.

Step 4: Resistance, Voltage Drop, and Power Loss

Using NIST-published copper physical data (resistivity 1.72 times 10^-6 ohm-centimeters at 20 degrees Celsius, temperature coefficient 3.9 times 10^-3 per degree Celsius), this calculator computes the DC resistance of the trace at operating temperature, the resulting voltage drop at your specified current, and the I-squared-R power loss. These outputs are essential for power distribution design: a 100-milliohm trace carrying 5 amperes drops 500 millivolts and dissipates 2.5 watts, which may be problematic for a tight voltage budget or a thermally constrained board.

IPC-2221 vs IPC-2152 Comparison: Trace Widths for Common US PCB Designs

The table below compares the minimum trace widths from both standards for common current values at 10 degrees Celsius temperature rise, 1 oz copper, external layer, standard FR4 0.062 inch board, no nearby copper plane. These are the “baseline” conditions without IPC-2152 correction factors applied, showing the inherent difference between the two standards’ base equations.

Current IPC-2221 External (mils / mm) IPC-2152 Base (mils / mm) IPC-2221 Internal (mils / mm)
0.5 A8.5 mil / 0.22 mm6.3 mil / 0.16 mm22.0 mil / 0.56 mm
1 A22.1 mil / 0.56 mm15.2 mil / 0.39 mm57.5 mil / 1.46 mm
2 A57.6 mil / 1.46 mm37.4 mil / 0.95 mm149.6 mil / 3.80 mm
5 A203.5 mil / 5.17 mm121.8 mil / 3.09 mm529.1 mil / 13.4 mm
10 A529.1 mil / 13.4 mm296.2 mil / 7.52 mm1376 mil / 34.9 mm
20 A1376 mil / 34.9 mm724.5 mil / 18.4 mm3577 mil (impractical)

All values at 10°C temperature rise, 1 oz copper, 25°C ambient. IPC-2152 base values are unmodified (no board/plane/conductivity correction factors). Internal layer values per IPC-2221 formula (k=0.024). IPC.org standards. Use the calculator above for your specific correction factors.

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Key Design Insight: IPC-2152 consistently produces narrower minimum trace widths than IPC-2221 for the same conditions. The difference grows with current: at 1A the gap is about 31%, at 10A it is 44%, and at 20A it approaches 47%. This means designs sized to IPC-2152 can be meaningfully more compact, but require more careful thermal validation since the safety margin over the old conservative standard is smaller.

Three Real US PCB Design Examples with Full Trace Width Calculations

🏠 Portland, OR
ESP32 Development Board Power Rail

A Portland maker is designing a custom ESP32 IoT board with OSHPark (2 layer, 1 oz copper). The 3.3V power rail needs to carry 800mA to the ESP32 plus peripherals. The trace runs 2 inches. Operating environment: indoor, 25°C ambient, 10°C allowed rise.

IPC-2221 external: 15.6 mil (0.40 mm)
IPC-2152 external: 10.3 mil (0.26 mm)
OSHPark min trace: 6 mil (0.15 mm), both standards compliant
Recommended: 20 mil (0.51 mm) using IPC-2221 with margin
R at 35°C: 46 mΩ, V-drop: 37 mV (0.01V), P-loss: 29 mW
🚙 Austin, TX
EV Charger Control Board Power Trace

An Austin EV startup is designing a 12V auxiliary power distribution board for an onboard battery charger. A power trace must carry 20A to a DC-DC converter. The board is 2 oz copper, 4 layer, with a ground plane 1mm below. Ambient: 70°C in underhood installation. 20°C allowed rise.

IPC-2221 external (20A, 20°C, 2oz): 687 mil (17.4 mm)
IPC-2152 with 2oz + plane 1mm + FR4: 362 mil (9.2 mm)
Savings: 47% narrower trace = significant space on a crowded board
Fusing current at 362 mil / 2oz: ~285A (93% safety margin)
IPC-2152 result recommended, validated with thermal camera post-build
🏭 San Jose, CA
Server Backplane Power Distribution

A San Jose semiconductor company designs a 48V server backplane with 3 oz copper traces carrying 30A to blade power connectors. The board is 0.125 inch thick with an adjacent power plane 0.5mm away. Maximum temperature rise allowed: 15°C for data center thermal compliance.

IPC-2221 external (30A, 15°C, 3oz): 645 mil (16.4 mm)
IPC-2152 (3oz + 0.125″ board + plane 0.5mm): 388 mil (9.9 mm)
IPC-2221 internal: not feasible (over 50mm wide)
Selected: 450 mil (11.4 mm), between standards, validated thermally
UL 796 certification required: document IPC-2152 calculation method used

Six Expert Tips for PCB Trace Sizing in US Commercial Designs

Tip 01

Always Add a 50% Width Margin Over the IPC Minimum

Both IPC standards produce a minimum trace width. Manufacturing tolerances (typical US PCB fabs hold plus or minus 10 to 20 percent on trace width), copper weight variation (plus or minus 10 percent), and the simplified thermal models all reduce the effective safety margin in production boards. For traces carrying more than 1 amp, add at least 50 percent to the calculated minimum width, and use the IPC-2221 result as your baseline rather than the narrower IPC-2152 value unless you have thermal validation data.

Tip 02

Use IPC-2152 with Plane Proximity When You Can

If your design has any copper pour or ground plane within 2mm of a high-current trace, enable the plane proximity correction in this calculator. A plane 1mm away reduces the required trace width by approximately 12 percent. At 10 amperes on a 2-layer board with a solid ground plane on the back side, you can meaningfully reduce trace width while maintaining the same thermal performance. This is one of the most underused optimizations in US PCB power design.

Tip 03

Derate Heavily for Connectors, Vias, and Solder Joints

The IPC formulas calculate trace width only, assuming a uniform copper conductor of constant cross-section. In reality, vias, solder joints, connector pins, and pads all introduce current constrictions that can be significantly hotter than the trace itself. A via rated for 0.5A in the IPC-2152 via current capacity charts can easily be the thermal bottleneck for a 5A trace. For high-current paths, always size vias with the same care as traces, and consider multiple parallel vias for currents above 1 to 2 amperes per via position.

Tip 04

Validate with a Thermal Camera After Prototyping

No calculator, however accurate, replaces measured data on a real board. After building the first prototype of any design carrying more than 5 amperes, run it at maximum rated current in the highest-temperature environment it will face, and image the board with an infrared thermal camera. US test labs (including those accredited for UL 796 testing) use this as the acceptance method. If your measured temperatures match your IPC calculation within 20 percent, your model is accurate. If not, adjust and recalculate before committing to production.

Tip 05

Consider 2 oz Copper Before Widening the Trace

Many US PCB fabs charge only a moderate premium (10 to 25 percent) to upgrade from 1 oz to 2 oz copper. Doubling the copper weight cuts the required trace width nearly in half for the same current and temperature rise, since resistance scales inversely with cross-sectional area. For boards that are space-constrained but not cost-constrained, 2 oz copper is often the most practical path to carrying high current without widening traces that would conflict with component placement.

Tip 06

Document Your Standard Choice for UL 796 and IPC-A-600 Compliance

When submitting a PCB for UL 796 listing or when providing design documentation for IPC-A-600 Class 2 or Class 3 acceptance, include a note in the design specification identifying which standard you used for trace width calculations and the temperature rise assumption. IPC and UL auditors expect this documentation. If you used IPC-2152, also document the correction factors applied. This creates a defensible engineering record if the board is ever questioned during a product liability or certification review.

Quick Reference: PCB Trace Width for US Standard Copper Weights

The table below gives quick-reference minimum trace widths per IPC-2221 at 10 degrees Celsius temperature rise for the four most common copper weights used by US PCB fabs. Values are for external layers. Multiply by approximately 2.6 for internal layers. All values in mils (one mil = 0.0254mm), the unit used by US PCB fabricators including OSHPark, Advanced Circuits, Sierra Circuits, and Sunstone Circuits.

Current0.5 oz Cu (0.69 mil)1 oz Cu (1.38 mil)2 oz Cu (2.76 mil)3 oz Cu (4.13 mil)Fusing Current (1 oz)
0.25 A4.9 mil2.5 mil1.2 mil0.8 mil~3.5 A
0.5 A17.0 mil8.5 mil4.2 mil2.8 mil~7 A
1 A44.2 mil22.1 mil11.1 mil7.4 mil~14 A
2 A115 mil57.5 mil28.8 mil19.2 mil~35 A
5 A407 mil203 mil102 mil68 mil~100 A
10 A1058 mil529 mil265 mil176 mil~260 A

IPC-2221 external layer, 10°C temperature rise, 25°C ambient. Fusing current per Brooks empirical formula. 1 mil = 0.0254mm. Minimum manufacturable trace width varies by US fab: OSHPark 6mil, Advanced Circuits 4mil, Sierra Circuits 3mil for standard processes. Use the calculator above for IPC-2152 values (typically 30-45% narrower).

Frequently Asked Questions About PCB Trace Width Calculations

What is the difference between IPC-2221 and IPC-2152 for trace width?+
IPC-2221 uses a simple empirical formula derived from 1950s test data, with two constants (k=0.048 for external, 0.024 for internal layers). IPC-2152, published by IPC in 2009, uses a more comprehensive dataset covering different copper weights, board thicknesses, plane proximity, and thermal conductivity. The practical result is that IPC-2152 almost always produces a narrower minimum trace width than IPC-2221 for the same conditions, because the newer standard’s test data shows copper traces can safely carry more current than the old charts predicted. For a 10A trace on a standard FR4 board with no nearby plane, IPC-2152 gives roughly 44% less width than IPC-2221. For a trace near a ground plane, the IPC-2152 advantage is even greater because the plane-proximity correction is not available in IPC-2221 at all.
Why does an internal trace need to be so much wider than an external trace?+
The primary mechanism of heat removal from a PCB trace is thermal conduction through the surrounding material, followed by convection from the board surface into the surrounding air. An external trace on the top or bottom copper layer is separated from the air by only a thin solder mask coating (typically 1 to 2 mils thick), which allows heat to escape relatively easily through convection. An internal trace is completely surrounded by FR4 substrate on all sides. FR4 is a relatively poor thermal conductor at about 0.20 watts per meter-kelvin, compared to copper at 385 watts per meter-kelvin. This means heat from an internal trace must conduct through a much higher thermal resistance before reaching the board surface where convection can remove it. The IPC-2221 formula reflects this by halving the k constant for internal layers (0.024 vs 0.048), which approximately doubles the required cross-sectional area. In a 4-layer board, inner layer power traces often need to be several times the width of outer layer signal traces carrying the same current, which is a common surprise for designers who treat all layers equally.
What temperature rise should I specify for IPC-2221 or IPC-2152 calculations?+
The IPC standards do not mandate a specific temperature rise; it is a design choice that depends on your application requirements. The most common choice in US commercial electronics is 10 degrees Celsius, which is cited as the IPC default and appears in most reference tables. For high-reliability designs (medical, military, aerospace), 5 degrees is sometimes specified to extend component life. For cost-optimized designs where space is the primary constraint, 20 to 30 degrees is common, especially in industrial and power electronics where overall board temperatures are managed by forced-air cooling. The key relationship to remember is that your maximum allowable trace temperature equals the ambient temperature plus the temperature rise. If your board sits in a 70-degree Celsius automotive environment and you specify 10-degree rise, the trace reaches 80 degrees Celsius, which must be below the operating limit of any component or solder joint in the thermal path.
How does a ground plane near a trace affect the required trace width?+
A copper plane (ground plane, power plane, or copper pour) within 2mm of a current-carrying trace acts as a significant heat sink. Copper is an excellent thermal conductor at 385 watts per meter-kelvin, roughly 2000 times better than FR4. Heat generated in the trace conducts through the thin FR4 dielectric layer to the plane and then spreads rapidly across the plane, greatly increasing the effective surface area available for convection. IPC-2152 quantifies this effect through plane proximity correction factors. A plane within 1mm reduces the required trace cross-sectional area by approximately 16 percent (IPC-2152 modifier approximately 0.84). A plane farther than 2mm provides roughly 6 percent reduction (modifier approximately 0.94). For dense 4-layer boards where every signal layer is adjacent to a power or ground plane at standard stack-up spacing, this correction is always applicable and can meaningfully reduce required trace widths.
What is fusing current and why does this calculator show it?+
Fusing current is the maximum current at which a copper trace will physically melt and open-circuit, acting as an unintentional fuse. This calculator uses the Brooks empirical formula: I_fuse = 12.3 times A^0.45, where A is the cross-sectional area of the trace in square mils. This formula gives a conservative estimate of when the copper temperature reaches its melting point (1085 degrees Celsius for copper). Understanding fusing current is important for two reasons. First, it tells you how much margin you have before catastrophic failure: a trace sized for 2 amperes by IPC standards might fuse at 30 amperes, giving a large safety factor. Second, in designs where you want the trace to act as an intentional fuse for overcurrent protection (sometimes done in cost-sensitive consumer products), knowing the fusing threshold lets you design the trace width to fail at the desired current. No other free web calculator currently shows this value alongside the standard trace width calculation.
What copper weight should I specify for a high-current PCB in the US?+
For currents under 5 amperes on external traces, standard 1 oz copper (1.378 mils = 35 micrometers) is adequate and is supported by every US PCB fabricator. For currents in the 5 to 20 ampere range, 2 oz copper (2.756 mils = 70 micrometers) roughly halves the required trace width at the same temperature rise, making it practical on boards where space is constrained. US fabs including Sierra Circuits, Advanced Circuits, and Sunstone Circuits all support 2 oz copper at modest price premiums over standard 1 oz processes. For power electronics carrying more than 20 amperes, 3 oz or 4 oz copper is used, though not all US fabs support these heavy copper options as standard, and lead times may be longer. Above about 30 to 50 amperes on a single trace, bus bar or external copper busbars become more practical than on-board copper traces regardless of weight.
How does the microstrip impedance calculation work and when do I need it?+
The microstrip impedance calculation uses the Hammerstad approximation: Z0 = (87 / sqrt(er + 1.41)) times ln(5.98H / (0.8W + T)), where H is the dielectric height in mils, W is the trace width in mils, T is the copper thickness in mils, and er is the relative permittivity of the substrate (4.3 for FR4, 3.48 for Rogers RO4350B). This gives the characteristic impedance of the trace acting as a transmission line. You need this calculation when your trace is carrying signals with rise times comparable to or shorter than the propagation delay of the trace itself. As a practical rule for US digital design, controlled impedance becomes important for signals above about 100 MHz or for any trace longer than about 1/10 of the wavelength at the highest signal frequency. Standard PCB design for digital interfaces like USB, Ethernet, PCIe, DDR memory, and RF transmitters all specify controlled impedance traces, typically 50 ohms for single-ended and 100 ohms differential. The calculation here is an approximation; for precision RF work, use a full-wave electromagnetic field solver.
Does the IPC-2221 formula have a maximum valid current range?+
Yes. The original IPC-2221 empirical data was measured only up to approximately 35 amperes for external traces and 17.5 amperes for internal traces, with trace widths up to 0.4 inches (400 mils) and temperature rises between 10 and 100 degrees Celsius. Any calculator using the IPC-2221 formula above these ranges is extrapolating beyond the measured data, which may give unreliable results. The same limitation applies to IPC-2152, which was developed for similar current ranges. For very high-current designs (above 40 to 50 amperes per trace), thermal simulation or empirical measurement is more reliable than any formula-based calculator. KiCad’s PCB calculator documents these validity limits explicitly in its published implementation notes. This calculator applies the IPC formulas across a broad range for convenience but displays results for currents above 35 amperes with awareness that extrapolation is occurring.
What US standards apply to PCB trace current capacity for product certification?+
Several US standards address PCB trace sizing for commercial products. UL 796 (Printed Wiring Boards) is the primary US safety standard for PCBs used in UL-listed products and specifies requirements for current-carrying capacity and temperature rise. IPC-2221 and IPC-2152 are both industry standards published by IPC (ipc.org), the US-based global association for the electronics industry, and are widely accepted as engineering references in UL, FCC, and CE certification documentation. IPC-A-600 defines the acceptability criteria for printed boards in three classes (Class 1 general electronics, Class 2 dedicated service electronics, Class 3 high-reliability electronics), with progressively stricter requirements for trace width conformance. For automotive PCBs sold in the United States, the AEC-Q200 qualification standard and the IPC-2221 appendices for automotive applications specify additional derating requirements. Medical device PCBs destined for FDA-regulated products must comply with IEC 60601-1 electrical safety requirements, which reference IPC standards for PCB design.
Can I use a narrower trace and accept a higher temperature rise to save board space?+
Yes, within limits. Both IPC standards show that increasing the allowed temperature rise reduces the required trace width significantly. Going from 10 degrees to 20 degrees Celsius allowed rise reduces the required width by approximately 30 to 35 percent for external traces. Going to 40 degrees reduces it by roughly 50 to 55 percent. The constraint is the maximum operating temperature of the components, solder joints, and PCB material in the thermal path. Standard FR4 has a glass transition temperature of 130 to 180 degrees Celsius depending on the grade (some high-Tg FR4 is rated to 170 degrees or more). If your ambient temperature is 25 degrees and you allow 40 degrees of trace rise, the trace reaches 65 degrees Celsius, which is well within the FR4 rating and comfortable for most components. If the ambient is 70 degrees (automotive underhood) and you allow 40 degrees rise, the trace reaches 110 degrees, which is approaching the limit for many standard components and solder joint specifications. The key rule is to track absolute trace temperature, not just the delta T, and ensure it stays within all material and component ratings in the thermal path.
How is copper weight measured in ounces per square foot, and how thick is it?+
Copper weight in printed circuit boards is expressed in ounces per square foot, which seems like an unusual unit for thickness but is the universal standard used by US PCB fabricators. One ounce per square foot of copper weighs approximately 28 grams distributed across one square foot of board area, and when spread that thin, it corresponds to approximately 1.378 mils (0.0350 mm or 35 micrometers) of copper thickness. This is why the formula uses the constant 1.378 to convert ounces to mils. Two ounce copper is 2.756 mils (70 micrometers). Half-ounce copper is 0.689 mils (17.5 micrometers), commonly used for fine-pitch BGA fanout on high-density designs where trace width minimums are the constraint rather than current capacity. Four ounce copper at 5.512 mils (140 micrometers) is used for extreme power distribution. NIST’s copper physical constants, including resistivity of 1.72 times 10^-6 ohm-centimeters at 20 degrees Celsius, are the basis for all resistance and voltage drop calculations in this calculator.
Why do internal layers need roughly 2.6 times the width of external layers?+
The factor of 2.6 (or more precisely the ratio of the k constants, 0.048 to 0.024) comes from the fundamental difference in thermal environment between a trace on an outer layer and one buried inside the board. An external trace loses heat primarily through two mechanisms: conduction through the thin solder mask into the air, and direct convection from the copper surface where the mask is absent. The effective thermal resistance to the ambient environment is relatively low. An internal trace has no direct path to the air at all. It loses heat only through conduction into the surrounding FR4 and then through the entire board thickness before reaching a surface where convection can remove it. FR4’s thermal conductivity (approximately 0.20 to 0.35 watts per meter-kelvin) is roughly 1000 to 2000 times lower than copper’s 385 watts per meter-kelvin. This creates a much higher thermal resistance from the internal trace to the ambient, requiring a much wider trace (more copper cross-section, lower resistance, less heat generated per unit current) to achieve the same temperature rise as an external trace carrying identical current.
How does a solder mask affect trace current capacity?+
Solder mask has two opposing effects on trace thermal performance. On the one hand, the LPI (Liquid Photo-Imageable) solder mask coating (typically 0.5 to 1.5 mils thick) insulates the trace surface from direct air convection, reducing heat dissipation and making the trace run slightly hotter for the same current. On the other hand, the solder mask has a higher emissivity than bare copper, meaning it radiates heat as infrared energy more efficiently. For most practical PCB designs at currents under 20 amperes, the net effect of solder mask is a slight reduction in current capacity: roughly 5 to 10 percent less current for the same temperature rise compared to a bare copper trace exposed to air. IPC-2221 does not distinguish between masked and unmasked traces. IPC-2152 includes data for traces in vacuum (which approximates a sealed enclosure with no convection), which shows significantly reduced current capacity. For standard air-cooled boards with solder mask, the IPC-2221 and IPC-2152 values include implicit assumptions about masked traces and provide a reasonable engineering estimate.
What is the minimum trace width at major US PCB fabs?+
Minimum trace width varies by fabricator and process tier. For standard 2-layer through-hole-plated boards at US fabs as of 2026: OSHPark (Portland, OR) specifies 6 mil minimum trace width on their standard 2-layer and 4-layer services. Advanced Circuits (Aurora, CO) offers 4 mil on their standard process and 3 mil on their advanced process. Sierra Circuits (Sunnyvale, CA) supports 3 mil on their production lines and finer widths on their HDI process. Sunstone Circuits (Mulino, OR) specifies 4 mil standard and 3 mil advanced. JLC PCB (US fulfillment) offers 3.5 mil on standard production. For most power trace calculations, the minimum trace from the IPC formulas at typical currents (1A and above) will be significantly wider than these minimums, so the fabricator constraint is rarely the binding limitation. It becomes relevant only for very low-current signal traces or for fine-pitch BGAs requiring thin fanout traces.
What verified standards and data sources back this PCB trace width calculator?+
The IPC-2221 formula (k=0.048 external, k=0.024 internal, exponents 0.44 and 0.725) is the standard curve-fit expression published by IPC at ipc.org and documented in the IPC-2221B generic printed board design standard. The IPC-2152 formula (Ac = (117.555 x dT^-0.913 + 1.15) x I^(0.84 x dT^-0.108 + 1.159)) is a curve fit to Figure 5-2 of IPC-2152 published in the smps.us PCB calculator documentation, validated to within 3 percent of the IPC chart values. Correction factor modifiers are derived from IPC-2152 chart data approximations documented in the mbedded.ninja IPC-2152 calculator. Copper physical constants (resistivity 1.72 times 10^-6 ohm-centimeters, temperature coefficient 3.9 times 10^-3 per degree Celsius) are NIST-published values at 20 degrees Celsius from nist.gov. Brooks fusing current empirical formula (12.3 x A^0.45) is an established industry reference for PCB copper traces. Microstrip impedance uses the Hammerstad approximation per standard RF engineering references. UL 796 and IPC-A-600 are referenced for US certification context. All results current through 2026.
Should I use mils or millimeters when specifying trace widths to a US PCB fab?+
For US PCB fabricators, mils (thousandths of an inch, also called thou) are the native unit and are unambiguous in communication. When you write “6 mil minimum trace,” every US fab engineer knows exactly what you mean. Millimeters are accepted by all major US fabs (since they also manufacture internationally), but specifying 0.15mm instead of 6 mil can occasionally cause confusion if the conversion is not exact. This calculator displays both mils and millimeters simultaneously so you can communicate clearly in either unit. For the design file itself, all major EDA tools (KiCad, Altium, Eagle, OrCAD) support both unit systems and handle the conversion automatically when you set design rules. The IPC standards themselves use mils as the primary unit for trace width tables, consistent with the US measurement conventions that governed the original test data collection.

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Editorial Transparency and Legal Disclaimer: The PCB Trace Width Calculator implements IPC-2221B (ipc.org) and IPC-2152 (ipc.org) formulas for copper trace current-carrying capacity. The IPC-2221 curve-fit constants (k=0.048/0.024, exponents 0.44/0.725) follow the published IPC-2221B standard. The IPC-2152 base equation is a curve fit to IPC-2152 Figure 5-2 published by smps.us, validated to within 3% of IPC chart values. IPC-2152 correction modifiers are approximate values derived from IPC-2152 chart data. Copper resistivity 1.72×10⁻⁶ Ω·cm at 20°C per NIST (nist.gov). Brooks fusing current formula and Hammerstad microstrip impedance are established engineering approximations. UL 796 and IPC-A-600 are referenced for US certification context. All results are estimates for educational and preliminary design purposes. Actual trace performance depends on board stackup, copper distribution, enclosure, airflow, and other factors not captured in simplified formulas. For safety-critical, medical, automotive, or UL-listed products, validate trace sizing with thermal simulation, empirical measurement, and review by a licensed professional engineer. Not a substitute for the complete IPC-2221B or IPC-2152 standards. Data current through 2026 per IPC, NIST, and UL published standards.